Need for modern Model Order Reduction
Jivaro-D is filling a gap between circuit extraction and circuit simulation, due to an accrued use of parasitic components in order to model the physical reality of interconnections, substrate or package.
Jivaro-D speeds up existing simulators by optimizing the models of the parasitics, combined with the need to predictably keep the accuracy of the netlist at a very high level.
Based on EDXACT's parasitics platform, Jivaro-D applies patent pending model order reduction techniques on parasitic components in netlists.
Jivaro-D naturally integrates into existing design flows, a trade-off between accuracy and speedup of the simulator can easily be chosen.
Jivaro-D exploits the topology of the circuit and is intended to be used on very large circuits.
